(ExpressProject "DIO-MSM-IDE"
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  (ProjectType "PCB")
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      (File
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        (Type "Schematic Library"))
      (File "c:\cadence\orcad_9.2.3\tools\capture\library\connector.olb"
        (Type "Schematic Library"))
      (File "c:\cadence\orcad_9.2.3\tools\capture\library\discrete.olb"
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      (File "c:\cadence\orcad_9.2.3\tools\capture\library\misc2.olb"
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      (File "c:\cadence\orcad_9.2.3\tools\capture\library\misc3.olb"
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      (File "c:\cadence\orcad_9.2.3\tools\capture\library\misc.olb"
        (Type "Schematic Library"))
      (File "c:\cadence\orcad_9.2.3\tools\capture\library\muxdecoder.olb"
        (Type "Schematic Library"))
      (File "c:\cadence\orcad_9.2.3\tools\capture\library\pld.olb"
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        (Type "Schematic Library")))
    (NoModify)
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    (BuildFileAddedOrDeleted "x")
    (CompileFileAddedOrDeleted "x")
    (Board_sim_option "VHDL_flow")
    (Netlist_TAB "3")
    ("Create Allegro Netlist" "TRUE")
    ("Allegro Netlist Directory" "H:\EDAPROJECTS\ORCAD")
    ("View Allegro Netlist Files" "FALSE")
    ("Update Allegro Board" "FALSE")
    ("Allegro Netlist Output Board File" "allegro\dio-msm-ide.brd")
    ("Allegro Netlist Remove Etch" "FALSE")
    ("Allegro Netlist Place Changed Component" "ALWAYS_REPLACE")
    ("Allegro Netlist Open Board in Allegro" "ALLEGRO")
    ("Allegro Setup Configuration File"
       "C:\Cadence\Orcad_9.2.3\tools\capture\allegro.cfg")
    ("Allegro Setup Backup Versions" "3")
    (ANNOTATE_Scope "0")
    (ANNOTATE_Mode "1")
    (ANNOTATE_Action "0")
    (ANNOTATE_Reset_References_to_1 "TRUE")
    (ANNOTATE_No_Page_Number_Change "FALSE")
    (ANNOTATE_Property_Combine "{Value}{Source Package}{POWER_GROUP}")
    (DRC_Scope "0")
    (DRC_Action "0")
    (DRC_Create_Warnings "FALSE")
    (DRC_Check_Ports "FALSE")
    (DRC_Check_Off-Page_Connectors "FALSE")
    (DRC_Identical_References "TRUE")
    (DRC_Type_Mismatch "TRUE")
    (DRC_Report_Ports_and_Off-page_Connectors "FALSE")
    (DRC_SDT_Compatibility "FALSE")
    (DRC_Report_Off-grid_Objects "FALSE")
    (DRC_Check_Unconnected_Nets "TRUE")
    (DRC_Report_Netnames "FALSE")
    (DRC_View_Output "FALSE")
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    (LAYOUT_Netlist_File "DIO-MSM-IDE-DIP.MNL")
    (LAYOUT_PCB_Footprint "{PCB Footprint}")
    (FALSE)
    (LAYOUT_Units "0")
    (TRUE)
    (FALSE))
  (Folder "Outputs"
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      (Type "Report")
      (DisplayName "pstxnet.dat"))
    (File ".\pstxprt.dat"
      (Type "Report")
      (DisplayName "pstxprt.dat"))
    (File ".\pstchip.dat"
      (Type "Report")
      (DisplayName "pstchip.dat"))
    (File ".\dio-msm-ide.drc"
      (Type "Report"))
    (File ".\dio-msm-ide.mnl"
      (Type "LAYOUT Netlist File"))
    (File ".\dio-msm-ide-dip.mnl"
      (Type "LAYOUT Netlist File")))
  (Folder "Referenced Projects")
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      (FullPartName "CAP NP.Normal")
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    (FileView
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      (Path "Design Resources" "Library")
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         "C:\Cadence\Orcad_9.2.3\tools\capture\library\BFT-Custom.olb")
      (Path "Outputs"))
    (HierarchyView)
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      (Type "COrCapturePMDoc")
      (Frame
        (Placement "44 0 1 -1 -1 -4 -23 0 275 0 1067"))
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    (Doc
      (Type "COrSchematicDoc")
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        (Placement "44 0 1 -1 -1 -4 -23 266 1881 4 1067")
        (Scroll "621 440")
        (Zoom "110")
        (Occurrence "/"))
      (Path "H:\EDAPROJECTS\ORCAD\DIO-MSM-IDE.DSN")
      (Schematic "SCHEMATIC1")
      (Page "PAGE1")))
  (LastUsedLibraryBrowseDirectory
     "C:\Cadence\Orcad_9.2.3\tools\capture\library"))