INDEX ƒ TEXT ƒ PARTS  ƒ DESCRIBE$ƒ  TEXT TEXT WORK FILE BYPP PARTS 1 PARTS LIST BYPP DESCRIBEDESCRIPTION BYPP @  @ PARTS LIST FOR SYNC-BUSTER @ @100 ohms R22,R35,R37 @22 K R3,R9,R12,R20 @6.8 K R6,R21,R25,R36,R38 @1.0 K R1,R11,R31,R34,R42,R43 @4.7 K R5,R14,R33 @10 K R16,R39,R40 @3.9 K R18 @33 K R17 @2.2 K R2,R4,R15,R27,R29,R30 @3.3 K R13,R23,R32 @560 ohms R24,R26 @270 ohms R10 @470 ohms R7,R28,R45 @12 K R8 @330 ohms R19,R46 @100 K R44 @15 K R41 @ @22 uf 16V electrolytic C31,C32,C33 @1 uf 25V tantalum C5,C6,C7,C8,C9,C37 @.0022 uf 100V Mylar C20 @.0047 uf 100V Mylar C19 @.1 uf 50V monolythic C1,C2,C3,C4 @.01 uf 50V monolythic C10,C11,C12,C13,C14,C15, @ C16,C17 @.001 uf 100V Mylar C18,C21,C23 @.01 uf 100V Mylar C22,C24 @5-50 miniature trim cap C34 @47 pf 50V disc C26 @68 pf 50V disc C28 @100 pf 50V disc C27 @220 pf 50V disc C29,C30 @300 pf 200V silver mica C25 @2200 uf 16 V electrolytic C35,C36 @ @1N914 or 1N4148 diode D1,D2,D4,D5,D6 @1N34A or 1N270 diode D3 @red LED LED1 @2N3904 Q1,Q2,Q3,Q4 @1 amp 50V bridge rectifier BR1 @3.58 MHz crystal (HC18/U) Xtal @ @CA3126 (SK3158/ECG797) IC1 @74LS169 IC2 @NE564 IC3 @74LS73 IC4 @MM5321 IC5 @74LS02 IC6 @CD4066 IC7,IC8 @74LS04 IC9 @LM339 IC10 @74LS123 IC11 @74LS90 (optional) IC12 @79L12AC IC13 @78L12AC IC14 @7805T (LM340T-5) IC15 @ @1 amp 3AG fuse and holder F1 @SPST pushbutton switch S1,S2 @SPST miniature switch S3,S4 @DPDT miniature switch S5 @SPDT miniature switch (optional) S6 @ @Miscellaneous: @7 14 pin soldertail dip sockets @5 16 pin soldertail dip sockets @1 suitable enclosure (Radio Shack 270-272A or similar) @1 24VAC,center tapped,450 ma transformer (Radio Shack @ 270-1366 or similar) @4 RCA chassis mount jacks @1 F61 chassis mount jack (optional) @1 line cord @assorted 4-40 hardware and spacers @#22 insulated, stranded wire (or Kynar wire on foil side) @for jumpers  @CIRCUIT DESCRIPTION: @ @Video Section @ @Baseband video is input through Q1, a buffer/inverter. @Normal video is passed through IC8 pins 3-4 and inverted @video passes through IC8 pins 1-2. Which video is to be @passed is determined by the setting of S3 (Norm/Invert @Video). When the switch is open, the input to IC9-1 is @high. The output of this section, IC9-2, is therefore low, @and output, IC8-3 is off. IC9-2 is also input to IC9-3. @When IC9-4 is high, then IC8 section 1-2 is on, passing @inverted video. C33, the 22 uf cap blocks the DC component @from Q1 and the inverted video is present at pins 1 and 4 @of IC7. D3, a 1N34A germanium diode is used to clamp the @incoming video at the desired level for output, regardless @of the DC level at Q1. Section 4-3 of IC7 is used to pass @video to the output buffer Q2. The signal at IC7-5 turns @the 4-3 section on at all the necessary times except during @lines 10 through 21 of the vertical interval. IC7 section @1-2 passes video during lines 10 through 21. These lines @are important in decoding Close Captioned and other verti- @cal data. IC7 section 11-10 is used to establish horiz- @ontal and vertical sync levels. The input of this section, @pin 11, has the voltage drop (about 700 millivolts) across @D6, a 1N914 diode. This level was selected to compensate @for the voltage drop across Q2's base/emitter junction. @IC7 section 8-9 is used to pass the color burst, and to @position it on the backporch of the reconstructed horizon- @tal sync pulse. @ Q3 is used similarly to Q1 except that it is a buffer/ @inverter for the 3.79545 MHz color reference signal. The @ability of this circuit to invert the color reference @electronically permits its use with video signals having @inverted color (Reds are Blue and Blues are Red, etc.). @SPDT switch S4 is used to manually invert the color refer- @ence. Resistor R32 is used to pass the correct DC level @of the horizontal backporch to IC7-8. The color burst will @"ride" this level. @ IC10, LM339, is a quad comparator, two sections of which @are used with an RC filter network to extract the vertical @sync pulses. These pulses are used to reset the vertical @portion of IC5, the MM5321 Sync Generator, whenever S2 is @depressed. @ IC11 is a dual retriggerable, monostable multivibrator @(74LS123). It has two functions. The first section gen- @erates a pulse nearly as wide as one vertical frame. The @function of this section will be to ignore extraneous @pulses from IC10 until it is approximately time for another @vertical pulse. This is of particular importance when @generating vertical sync from a VideoCypherII signal. The @second section of IC11 generates a narrow pulse coincid @ental with the first section. However, section two cannot @pulse again until section 1 has timed out. Thus, a pure @train of vertical pulses are generated which can be used @to reset IC5 on demand. @ @Sync Section @ @ The heart of this section is the MM5321 TV Camera Sync @Generator. It provides the basic sync functions required @to support 525 line/60 Hz, color or monochrome video. In @our application, it will provide composite sync, blanking, @color burst gating, as well as horizontal and vertical @drive for external devices. All of these signals are de- @rived from a 2.04545 MHz signal which is phase locked to @the incoming video color burst. IC1 is an RCA CA3126 @chroma processor normally used in a color TV receiver. In @our application it functions almost normally with only two @exceptions. First, the loop filter has a much faster re- @sponse than in a TV set application. This is necessary for @the chip to lock onto the first color burst it encounters @as the chroma chip drifts in phase with respect to the @broadcast station's signal. The other exception is the @source of the burst gate. Normally, the chroma chip is @gated by an extract of a TV set's horizontal circuitry. In @our application, the gate is the color burst gate from the @MM5321 sync chip. The chroma output from the CA3126 is @converted from a sine wave to a square wave by transistor @Q4 and then passed into IC2 (74LS169) where it is divided @by seven. The output of IC2 is a 511363 Hz signal which is @one of two inputs to IC3 (NE564), a phase lock loop oper- @ating at 2.04545 MHz. IC4 provides the other input to IC3 @(also at 511363 Hz) after dividing IC3's output by four. @The combination of IC3 and IC4 make up a frequency multi- @plier operating at four times the input frequency. @ @HOW IT WORKS: @ @Video Section @ @ The video section is straightforward. The input video @is buffered and/or inverted by Q1. A CD4066 analog gate @is used to select normal or inverted video. The video @signal is passed through a 22 uf cap to remove its DC com- @ponent. Another CD4066 analog gate is used to mix the in- @coming video and to insert a synthesized color burst at the @correct locations with respect to the video signal. The @synthesized color burst is buffered and/or inverted by Q2. @Two sections of a CD4066 are used to select normal or in- @verted color burst. This allows the Sync Buster to adapt @to various video schemes currently in use. @ @Sync Section @ @ The 525 line, 60 Hz standard sync is genereated from @signals derived from the broadcast station's color burst. @A standard chroma processor IC is used to extract the color @burst from a scrambled or from a normal TV signal. A con- @tinuous 3.579545 MHz signal locked in phase to the broad- @cast signal is divided by seven (7) then multiplied by four @(4) to produce a 2.045454 MHz signal which is input into @the TV sync generator. The sync generator in turn outputs @various sync signals including the burst gate which is used @by the chroma processor to sample the incoming broadcast @signal. When the broadcast color burst and the generated @burst gate coincide, the system "locks on" and is then con- @synchronous. @ The sync information from the TV sync generator is mixed @with the video information through the two remaining gates @of the CD4066 and buffered by Q2. The resultant output is @totally reconstructed video with the various levels of the @NTSC standard signal in their proper location and order.