Falcon Processor Reworks for V2 artwork		       RG and DGS
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ECO#1
5/26/88 PROC.  initialize flop controling address phase to main register memories.
	Bend up C6-10
	Add wire C6-10 to H20-19  RESET
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ECO#2   BNU-ADDR0 thru 8 not run to Config PROM
	ADD D34.2 TO A16.10     ADR0
	ADD D34.5 TO A16.9      ADR1
	ADD D34.6 TO A16.8	ADR2
	ADD D34.9 TO A16.7	ADR3
	ADD D34.12 TO A16.6	ADR4
	ADD D34.15 TO A16.5	ADR5
	ADD D34.16 TO A16.4     ADR6
	ADD D34.19 TO A16.3     ADR7
	ADD C28.2 TO A16.25	ADR8

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ECO#4   MEM  ICACHE_XPHASE
	LIFT PIN 5 OF ALL SPY IREG CHIPS  D26,E26,F26,G26,D27,E27,F27,G27
		CONNECT ALL TO P5A.30  ICACHE_XPHASE
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ECO#5  	ICACHE_XPHASE FROM K11 PAL ICSEQ WAS PULLED FROM WRONG PIN, SHOULD BE 14 NOT 18.
5/31/88	LIFT PIN 18 OK K11 AND PIN 2 OF K13.  CONNECT TOGETHER LIFTED PINS.
	CONNECT WIRE TO P5.30 FROM K11.14

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CHANGE MFO-PAL NOW MFO-V2

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ECO#6	TERMINATOR SCREWWED UP 
	H9.12 TO J1.10		MAP WRITE
	H9.11 TO C9.13		GC WE
	C20.13 TO H9.10		TRANSPORTER WE
-- no! this fix is inadequate!!!  it leaves old miswires in effect shorting things out.
   the dip resistor in h9 somehow got completely the wrong pinout!!  This resulted in having
   the same pin on more than one run!!  Fortunately, the vendor pc program ignored one of the
   runs, thus failing to hook both runs inextricably together.
   the following pins may be affected:
   h9.5		one unnamed run to I13.15, ok	pal output for map-write*
   h9.6		one unnamed run to I13.16, ok   pal output for gc-we*
   h9.7		one unnamed run to i13.18, ok   pal output for transp-we*
   h9.10	no connect		transp-we* in fact comes out here.
   h9.11	no connect		gc-we*  in fact comes out here.
   h9.12	no connect		map-write* in fact comes out here.
   h9.13	wirelist indicates both on BLM-A9 and MAP-WRITE*  Is on BLM-A9.  is not on MAP-WRITE* run.
   h9.14	wirelist indicates both on BLM-A8 and  GC-WE*
   h9.15	wirelist indicates both on ALM-A9 and TRANSP-WE*
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ECO#7	GROUND PD_MEMCTL AT SIP (TOO MUCH LOAD)  GROUND C17B PIN 2.
6/1/88
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ECO#8   PARALLEL ENTRY COUNTER FOR HISTORY RAM SHOULD GO TO PULLUP
	CUT PIN 12 ON BOTH J23 AND J24, SHORT PIN TO PIN 14.
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6/22/88 MEM prevent traps attempting to happen when spy single stepping machine.  It would wedge.
ECO#9 Add  I13-7 to J22-16   SPY-ENABL
      Refrotz TRAPE PAL new version is 5.
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7/6/88  widen write pulse to register memories REG-WR~ .  It was only 10ns!.  Uses 74AS08 section at D7.11
ECO#10 Lift C13.10
       Add A7.13 to D7.12 and D7.13
       Add D7.11 to C13.10 (pin).