@chapter System Architecture Modifications
@label[chapter-architecture]
@cindex[architecture]

The most significant areas of development in release 4 networking
include a substantial overhaul of the low-level drivers and
new device-independent intermediate protocol layers.
This results in significant performance and reliability improvements.

The relationship between the LISP processors and hardware interfaces
has been radically altered.
See @ref[figure-compare-architecture], which diagrams
the functional relationships between components of the communications architecture
for release 3 vs@. release 4.

@fullpagefigure
@setq figure-compare-architecture figure-page

@tex
     \special{:saved-paint-image "it:keith.release-4;paint-net-rel3.qfasl"}
@end tex
@vskip 4in
@tex
     \special{:saved-paint-image "it:keith.release-4;paint-net-rel4.qfasl"}

@end tex

@caption Comparison, release 3 vs@. release 4
@end(fullpagefigure)

@section LISP Networking Architecture

In previous releases, each network protocol was implemented with a different
hardware interface -- 3COM for Chaosnet, Excelan for TCP/IP.
On Lambda systems with multiple LISP processors,
the first processor to boot (usually the slot 0 processor)
allocated the Ethernet board(s) and served as the front-end
for other processors on the bus.
@cindex[front-end TCP Chaos server]
Given a heavy load of network traffic, this resulted
in noticeable performance degradation.

In 4.0 LISP, every LISP processor on a Lambda system
that is configured with at least one Ethernet interface board,
either a 3COM@tm@  or Excelan@tm@ , can use both protocols.
The system can support up to two boards,
one of each type for each of two processors.
(Two boards of the same kind cannot be combined.)
For example, on a Lambda-2x2 with one 3COM and one Excelan,
slot 0 will allocate one, and slot 4 will allocate the other.

@cindex[boot order]
The boot order is not important, but for consistency,
the first processor to boot will allocate a 3COM (if present),
the second will allocate the Excelan (if present);
a third Lambda (on a 3x3) will, by preference, go through the 3COM owner.

As before, if only board is available, all Lambdas in the system can still access the network.
When the LISP processor boot up,
a system with a single board will configure itself such that
the first processor to boot will control the board and
the other LISP processor(s) will go through the first processor,
using the Extended Streams Interface@tm@  to access the network.

The significant rewrite of the low-level communications support
results in improvements over release 3 even in
systems with a single hardware interface.

There are no new restrictions on networking imposed by the
new architecture, and
no hardware modifications are required.














@c end arch1