* * TEST 13 CHECKS THE HARDWARE HANDSHAKE MODE * TST13 NOP ENTRY POINT LDA USSC CHECK FOR DUAL CPU TRANSFER AND BIT8 SZA,RSS JMP TST13,I NO, EXIT TEST LDA .5 YES, SET TIME FOR STA TIME WAIT SUBROUTINE LDA BIT13 GET HANDSHAKE BIT STA WORD SAVE FOR CWORD CLA STA SWORD+1 * LDA T13ST GET DEF POINTER JSB HDWSI DO SUBROUTINES JMP TST13,I GOOD RETURN * LDB ERROR SET STATUS WORD STB TTX4 FOR ERROR MESSAGE * CLB SET EXIT CODE JSB ERRS FIND ERROR TYPE IF COMMON * CPA .17 HANDSHAKE COMPARE ERROR? JMP TE131 YES * HLT 66B * * T13ST DEF T13SA * TE131 LDA SWORD STA TE132 LDA SWORD+1 STA TE132+1 JSB ER,I REPORT ERROR DEF TST13,I RETURN POINT DEF *+3 MESSAGE ADDRESS TE132 NOP A REG NOP B REG ASC 17,HANDSHAKE ERROR-SHOULD BE #, IS #/ * * * SETUPS FOR TEST 13 * T13SA EQU * DEF T13S1 1 CPU DEF LIST DEF T13S2 2 CPU XMIT DEF LIST DEF T13S3 2 CPU RCVR DEF LIST * T13S1 EQU * DEF NONO NO CAN DO MESSAGE SKP T13S2 EQU * DEF XSTAR GET CPU'S IN STEP DEF FXMIT TRANSMIT A WORD DEF LOOP WAIT FOR WORD DEF FLAG CLEAR FLAG DEF CHFLG WHY FLAG? DEF SRCVR RECEIVE SPECIAL WORD DEF COMP1 COMPARE THEM DEF WAIT PAUSE 1 MS DEF SXMIT TRANSMIT WORD AS SIGNAL DEF CWORD OUTPUT CONTROL WORD DEF SXMIT LOAD BUFFER DEF LOOP WAIT FOR WORD DEF FLAG CLEAR FLAG DEF CHFLG WHY FLAG DEF CLEAR CLEAR HANDSHAKE BIT DEF LOOP WAIT FOR SIGNAL WORD DEF FLAG CLEAR FLAG DEF CHFLG WHY FLAG DEF SRCVR CLEAR SUSPEND DEF RESET RESET POINTERS DEF WAIT PAUSE 1 MS DEF HXMIT XMIT IST WORD, SET CONTROL, 2ND DEF XMIT LOAD TRANSMITTER DEF FLAG WAIT FOR FLAG DEF CHFLG WHY FLAG? DEF LOOPR BACK UP 3 WORDS IN LOOP DEF RCVR CLEAR SUSPEND DEF GOOD COMPLETED MESSAGE SKP T13S3 EQU * DEF RSTAR GET CPU'S IN STEP DEF CWORD OUTPUT CONTROL WORD DEF SXMIT LOAD BUFFER DEF LOOP WAIT FOR WORD DEF FLAG CLEAR FLAG DEF CHFLG WHY FLAG? DEF CLEAR CLEAR HANDSHAKE BIT DEF LOOP WAIT FOR SIGNAL WORD DEF FLAG CLEAR FLAG DEF CHFLG WHY FLAG? DEF SRCVR CLEAR SUSPEND DEF WAIT PAUSE 1 MS DEF FXMIT TRANSMIT A WORD DEF LOOP WAIT FOR WORD DEF FLAG CLEAR FLAG DEF CHFLG WHY FLAG? DEF SRCVR RECEIVE SPECIAL WORD DEF COMP1 COMPARE THEM DEF WAIT PAUSE 1 MS DEF SXMIT TRANSMIT WORD AS SIGNAL DEF CWORD OUTPUT CONTROL WORD DEF SXMIT LOAD BUFFER DEF LOOP WAIT FOR WORD DEF FLAG WAIT FOR FLAG DEF CHFLG WHY FLAG? DEF RCVR RECEIVE A WORD DEF LOOPR BACK UP 3 WORDS IN LOOP DEF COMPA COMPARE BLOCKS DEF GOOD COMPLETED MESSAGE SKP * * TEST 14 CHECKS LISTEN-REPEAT MODE * TST14 NOP ENTRY POINT LDA USSC CHECK FOR DUAL CPU TRANSFER AND BIT8 SZA,RSS JMP TST14,I NO, EXIT TEST LDA .2 YES, SET INITIAL ADDRESS STA ADDR FOR LISTEN-REPEAT CCA SET ALL BITS FOR ADDRESS WORDS STA WORDS STA WORDS+1 STA WORDS+2 XOR BIT15 ONLY 63 ADDRESS SO STA WORDS+3 DELETE 64TH BIT * LDA T14ST GET DEF POINTER JSB HDWSI DO SUBROUTINES JMP TST14,I GOOD RETURN * CPA .7 WAS IT FROM NOREC? JMP TST14,I YES, EXIT * LDB ERROR SET STATUS WORD STB TTX4 FOR ERROR MESSAGE * LDB .1 SET EXIT CODE JSB ERRS FIND ERROR TYPE IF COMMON * CPA .2 WAIT FOR INTERRUPT ABORT? JMP TE141 YES * CPA .3 LISTEN-REPEAT ERROR? JMP TE142 YES * CPA .4 TAG BIT SET? JMP TE143 YES * CPA .5 WRONG RECOGNITION? JMP TE144 YES * CPA .6 IMPOSSIBLE ADDRESS? HLT 13B YES, SOFTWARE SICK * HLT 66B SKP TE141 JSB ER,I REPORT ERROR DEF TST14,I RETURN POINT DEF *+3 MESSAGE ADDRESS OCT 1 A REG OCT 1 B REG ASC 12,NO INT IN LISTEN-REPEAT/ * TE142 LDA ADDR SET UP NUMBERS FOR STA TS142 ERROR MESSAGE LDA WADDR STA TS142+1 JSB ER,I REPORT ERROR DEF TST14,I RETURN POINT DEF *+3 MESSAGE ADDRESS TS142 NOP A REG NOP B REG ASC 19,LISTEN-REPEAT ERROR: SENT #, RECEIVED ASC 1,#/ * TE143 JSB ER,I RERORT ERROR DEF TST14,I RETURN POINT DEF *+3 MESSAGE ADDRESS NOP A REG NOP B REG ASC 19,TAG BIT SET WITH ADDRESS CONFIRMATION/ * TE144 LDA ADDR SET UP NUMBERS FOR STA TS144 ERROR MESSAGE LDA WADDR STA TS144+1 JSB ER,I REPORT ERROR DEF TST14,I RETURN POINT DEF *+3 MESSAGE ADDRESS TS144 NOP A REG NOP B REG ASC 19,RECOGNITION ERROR: SHOULD BE #, IS #/ * T14ST DEF T14SA SKP * * SETUPS FOR TEST 14 * T14SA EQU * DEF T14S1 1 CPU DEF LIST DEF T14S2 2 CPU XMIT DEF LIST DEF T14S3 2 CPU RCVR DEF LIST * T14S1 EQU * DEF NONO NO CAN DO MESSAGE * T14S2 EQU * DEF XSTAR GET CPU'S IN STEP DEF STAG SET TAG BIT DEF LRS GET ADDRESS AND SEND DEF FLAG WAIT FOR REPEAT DEF CHFLG WHY FLAG? DEF LRG GET AND COMPARE REPEATED WORD DEF SHPAS WAIT FOR ADDRESS CONFIRMATION DEF LRLOP INCREMENT ADDRESS AND LOOP DEF NOREC SEE IF ANY NO RECOGNITIONS DEF GOOD COMPLETED MESSAGE * T14S3 EQU * DEF RSTAR GET CPU'S IN STEP DEF LRCWD SET LISTEN-REPEAT MODE DEF LRS SET ADDRESS DEF ENINT ENABLE INTERRUPT DEF SLOOP WAIT FOR INTERRUPT DEF LRCLR DISABLE LISTEN-REPEAT DEF LRS SEND THIS ADDRESS DEF LRLOP INCREMENT ADDRESS AND LOOP DEF GOOD COMPLETED MESSAGE SKP * * TEST 15 CHECKS TAG 1 INTERRUPT OF DMA TRANSFER * TST15 NOP ENTRY POINT LDA USSC CHECK FOR DUAL CPU TRANSFER AND BIT8 SZA,RSS JMP TST15,I NO,EXIT TEST LDA BIT8 YES, GET IRQ TAG BIT STA WORD FOR CWORD CLA STA SWORD+1 LDA .5 SET WAIT LOOP IN SUBROUT. "WAIT" STA TIME TO 5 MS. LDA WCSTP SET WORD COUNT POINTER TO STA WCP BEGINNING OF TABLE * LDA T15ST GET DEF POINTER JSB HDWSI DO SUBROUTINES JMP TST15,I GOOD EXIT * LDB ERROR SET STATUS WORD STB TTX4 LDB .2 SET EXIT CODE JSB ERRS FIND ERROR TYPE IF COMMON * CPA .6 DMA XMIT ABORT? JMP TE151 YES * CPA .2 NO RCVR INTP? JMP TE152 YES * CPA .17 TAG ONE WORDS NOT COMPARE? JMP TETXL YES * CPA .7 TAG BIT NOT SET? JMP TETX7 YES * * CPA .5 RESIDUE WRONG? JMP TE153 YES * HLT 66B SKP TETXL JSB ER,I REPORT ERROR DEF TST15,I RETURN POINT DEF *+3 MESSAGE ADDRESS OCT 2 A REG NOP B REG ASC 16,TAG BIT NOT SET IN STATUS WORD/ * TETX7 JSB ER,I REPORT ERROR DEF TST15,I RETURN POINT DEF *+3 MESSAGE ADDRESS OCT 1 A REG NOP B REG ASC 15,TAG ONE WORDS DO NOT COMPARE/ * TE151 JSB ER,I REPORT ERROR DEF TST15,I RETURN POINT DEF *+3 MESSAGE ADDRESS OCT 3 A REG NOP B REG ASC 11,ABORTED DMA TRANSFER/ * TE152 JSB ER,I REPORT ERROR DEF TST15,I RETURN POINT DEF *+3 MESSAGE ADDRESS OCT 4 A REG NOP B REG ASC 9,NO INT WHILE DMA/ * TE153 LDA RESID STA TE154 JSB ER,I REPORT ERROR DEF TST15,I RETURN POINT DEF *+3 MESSAGE ADDRESS TE154 NOP A REG OCT 17716 B REG ASC 16,RESIDUE WRONG; = #, SHOULD BE #/ * T15ST DEF T15SA SKP * * SETUPS FOR TEST 15, STARTING ADDRESSES OF SUBROUTINES * T15SA EQU * DEF T15S1 1 CPU DEF LIST DEF T15S2 2 CPU XMIT DEF LIST DEF T15S3 2 CPU RCVR DEF LIST * T15S1 EQU * DEF NONO NO CAN DO MESSAGE * T15S2 EQU * DEF CHCON CHECK CONFIGURATION FOR DMA DEF XSTAR GET CPU'S IN STEP DEF WRDCT SET WORD COUNT FOR DMAX & DMAR DEF DMAX START DMA TRANSMIT DEF DMAWF WAIT FOR DMA COMPLETION DEF FLAG CHECK IF FLAG SET, IF SET CLEAR IT DEF STAG SET TAG BIT (BIT6), THEN JSB CWORD DEF SXMIT TRANSMIT SPECIAL WORD DEF CHFLG CHECK IF FLAG SET BY STAT WD BITS 0,1&3 DEF LOOP LOOP & WAIT F.1ST WORD TRANSMITTED DEF FLAG CHECK IF FLAG SET, IF SET CLEAR IT DEF CHFLG CHECK IF FLAG SET BY STAT WD BITS 0,1&3 DEF SRCVR RECEIVE SPECIAL WORD DEF COMP1 COMPARE TRANSMITTED WITH RECEIVED WORD DEF TAG1 CHECK VIA STATUS WORD IF TAG BIT WAS SET * DEF XSTAR GET CPU'S IN STEP * DEF GOOD COMPLETED MESSAGE SPC 2 T15S3 EQU * DEF CHCON CHECK CONFIGURATION FOR DMA DEF RSTAR GET CPU'S IN STEP DEF CWORD OUTPUT CONTROL WORD TO BOARD ONLY DEF WRDCT SET WORD COUNT FOR DMAX & DMAR DEF DMAR START DMA RECEIVE DEF ENINT ENABLE INTPT & SET TRAP CELL OF INTF TO INTPT DEF SLOOP LOOP & WAIT FOR INTERRUPT WHILE DMA DEF TAG1 CHECK VIA STATUS WORD IF TAG BIT WAS SET DEF COMP1 COMPARE TRANSMITTED WITH RECEIVED WORD DEF CHRES CHECK RESIDUE OF WORD COUNT REG. DEF STAG SET TAG BIT (BIT6), THEN JSB CWORD DEF SXMIT TRANSMIT SPECIAL WORD DEF CHFLG CHECK IF FLAG SET BY STAT WD BITS 0,1&3,1&3 * DEF RSTAR GET CPU'S IN STEP * DEF GOOD COMPLETED MESSAGE SKP * REPORT DMA INTERRUPT ERROR * TEST 15 * DMAIN CLC 0,C TURN OFF INTERRUPTS CLC 6,C DISABLE DMA LDB HLT6 RESTORE TRAP CELL HALT STB 6 JSB ER,I REPORT ERROR DEF TSTX,I RETURN POINT DEF *+3 MESSAGE ADDRESS NOP A REG NOP B REG ASC 7,HAD A DMA INT/ SPC 4 * ENABLE RECEIVE DMA AND BOARD * TEST 15 * DMAR NOP ENTRY POINT LDA CW1 GET I/O CHANNEL OTA 6 SET DMA * CLC 2 LDA DEST GET DESTINATION ADDRESS IOR BIT15 SET INPUT BIT OTA 2 SET DMA * STC 2 LDA CW3R GET WORD COUNT OTA 2 SET DMA * STC 6,C ACTIVATE DMA DSCR1 CLF TSC CLEAR BOARDS FLAG JMP DMAR,I EXIT SPC 4 * GET WORD COUNT FOR TRANSMITTER AND RECEIVER FROM TABLE * TEST 15 * WRDCT NOP LDA WCP,I GET WORD COUNT FOR TRANSMITTER, STA CW3X STORE AND INCREMENT POINTER ISZ WCP NOP LDA WCP,I GET WORD COUNT FOR RECEIVER, STA CW3R STORE AND INCREMENT POINTER ISZ WCP NOP JMP WRDCT,I EXIT SKP * ENABLE TRANSMIT DMA AND BOARD & SET TRAP CELL OF DMA TO INTPT * TEST 15 * DMAX NOP ENTRY POINT LDA DMAS STORE JMP,I TO SUBROUT DMAIN STA 6 INTO TRAP CELL LDA CW1 GET I/O CHANNEL OTA 6 SET DMA CLC 2 LDA CW2X GET SOURCE ADDRESS OTA 2 SET DMA * STC 2 LDA CW3X GET WORD COUNT OTA 2 SET DMA * STC 6,C ACTIVATE DMA DSCX1 STF TSC ACTIVATE BOARD JMP DMAX,I SPC 4 * WAIT FOR DMA COMPLETION ON BOARD * TEST 15 * DMAWF NOP LDA .M35C SET COUNTER FOR ABORT 3500 LOOPS STA TMP SFS 6 WAIT FOR DMA COMPLETION JMP *+2 NOT YET JMP DMAW1 YES, EXIT * ISZ TMP CHECK FOR ABORT JMP *-4 NOT YET * ISZ DMAWF LDA .6 ERROR CODE = 6 DMAW1 LDB HLT6 RESTORE TRAP CELL STB 6 CLC 6,C DISABLE INTP JMP DMAWF,I EXIT SKP SPC 4 HLT6 OCT 106006 CW1 OCT 0 CW2X EQU SOURC CW3X OCT 0 CW3R OCT 0 * WCSTP DEF WCTR WCP DEF WCTR WCTR DEC -50 DEC -100 SKP ADREC ASC 13,NO RECOGNITION-ADDRESS #/ * * SAS EQU * REP 10 OCT 52525 REP 10 OCT 125252 REP 10 OCT 100001 REP 10 OCT -1 REP 10 OCT 70707 REP 10 OCT 107070 REP 10 OCT -1 REP 10 OCT 100001 REP 10 OCT 125252 REP 10 OCT 52525 * SAD EQU * BSS 100 FWAA EQU * END