HED TST07 - TEST THE STC DECISION FLIP-FLOP * TST07 -- CHECKS THE STC DECISION FF * TST07 JSB TSTC1 CHECK DMA1 STC. SFS 0 DID I-O INTERRUPT? JMP E043+2 YES! DO NEXT TEST. JSB FIXMS NO! UPDATE ASC 1,43 ERROR DEF EE043+1 MESSAGE. E043 JSB ERMSG DMA1--BIT 15 OF CTL WRD=1 BUT DEF EE043 I/O CTL NOT SET AFTER XFR CLF 0 TURN OFF INT SYSTEM. JSB RDYD1 READY DMA1. JSB RDYD2 READY DMA2 JSB CLCC CLC ON I-O SC. LDA USRSC CHANGE CTL WRD TO NO STC DURING XFER. OTA 6 OUTPUT TO DMA1. IOR BIT15 TRY TO CHANGE DMA1 BY OTA 7 CHANGING DMA2. STC 6,C TURN ON DMA1. CLC 6 CLR DMA CTL TO AVOID DMA INT. JSB STF SET I/O FLAG. STF 0 ENABLE INT. IF I-O CTL IS CLEAR, NOP NO INT WILL OCCUR SFC 0 DID I-O INTERRUPT OCCUR? JMP E044+2 NO! DO NEXT TEST. JSB FIXMS YES! UPDATE ASC 1,44 ERROR DEF EE043+1 MESSAGE. E044 JSB ERMSG DMA1--BIT 15 OF CTL WRD=0 BUT DEF EE043 I/O CTL SET AFTER XFR SKP CLF 0 TURN OFF INTERRUPT SYSTEM JSB RDYD1 READY DMA1 JSB RDYD2 READY DMA2. JSB TSTC2 CHECK DMA2 STC. SFS 0 DID I-O INTERRUPT? JMP E045+2 YES! DO NEXT TEST. JSB FIXMS NO! UPDATE ASC 1,45 ERROR DEF EE045+1 MESSAGE. E045 JSB ERMSG DMA2--BIT 15 OF CTL WRD=1 BUT DEF EE045 I/O CTL NOT SET AFTER XFR CLF 0 TURN OFF INT SYSTEM. JSB RDYD1 READY DMA1. JSB RDYD2 READY DMA2. JSB CLCC CLC ON I-O SC. LDA USRSC CHANGE CTL WORD TO NO STC OTA 7 DURING XFER. IOR BIT15 TRY TO CHANGE DMA2 BY OTA 6 CHANGING DMA1. STC 7,C TURN ON DMA2. CLC 7 DISABLE DMA2 INTERRUPTS. JSB STF SET I-O FLAG FF. STF 0 ENABLE INT SYS. IF I-O CTL IS NOP CLEAR, NO INT WILL OCCUR. SFC 0 DID I-O INTERRUPT OCCUR? JMP TRETN NO! EXIT TEST SECTION. JSB FIXMS YES! UPDATE ASC 1,46 ERROR DEF EE045+1 MESSAGE. E046 JSB ERMSG DMA2--BIT 15 OF CTL WRD=0 BUT DEF EE045 I/O CTL SET AFTER XFR JMP TRETN EXIT TEST SECTION. HED TST08 - TEST THE CLC DECISION FLIP-FLOP * TST08 -- CHECKS THE CLC DECISION FF * TST08 LDA CLF0 PUT A CLF0 IN THE STA USRSC,I I-O TRAP CELL. LDA USRSC CHANGE CONTROL WORD TO CLC IOR BIT13 SET AND STC CLEAR. JSB TCLC1 CHECK DMA1 CLC. SFC 0 DID I-O INTERRUPT? JMP E047+2 NO! DO NEXT TEST. JSB FIXMS YES! UPDATE ASC 1,47 ERROR DEF EE047+1 MESSAGE. E047 JSB ERMSG DMA1--BIT 13 OF CTL WRD=1 BUT DEF EE047 I/O CTL SET AFTER XFR CLF 0 TURN OFF INTERRUPTS JSB RDYD1 READY DMA1. JSB RDYD2 READY DMA2. LDA BIT15 CHANGE CTL WORD TO STC IOR USRSC SET, CLC NOT SET. JSB TCLC1 CHECK DMA1 CLC. SFS 0 DID I-O INTERRUPT. JMP E050+2 YES! DO NEXT TEST. JSB FIXMS NO! UPDATE ASC 1,50 ERROR DEF EE047+1 MESSAGE. E050 JSB ERMSG DMA1--BIT 13 OF CTL WRD=0 BUT DEF EE047 I/O CTL NOT SET AFTER XFR CLF 0 TURN OFF INTERRUPTS JSB RDYD1 READY DMA1. JSB RDYD2 READY DMA2. LDA USRSC SET CTL WORD TO CLC IOR BIT13 AFTER TRANSFER. JSB TCLC2 CHECK DMA2 CLC. SFC 0 DID I-O INTERRUPT? JMP E051+2 NO! DO NEXT TEST. JSB FIXMS YES! UPDATE ASC 1,51 ERROR DEF EE051+1 MESSAGE. E051 JSB ERMSG DMA2--BIT 13 OF CTL WRD=1 BUT DEF EE051 I/O CTL SET AFTER XFR CLF 0 TURN OFF INTERRUPTS JSB RDYD1 READY DMA1. JSB RDYD2 READY DMA2. LDA BIT15 SET CTL WORD TO STC AND IOR USRSC NO CLC AFTER XFER. JSB TCLC2 CHECK DMA2 CLC. SFS 0 DID I-O INTERRUPT? JMP TRETN YES! EXIT TEST SECTION. JSB FIXMS NO! UPDATE ASC 1,52 ERROR DEF EE051+1 MESSAGE. E052 JSB ERMSG DMA2--BIT 13 OF CTL WRD=0 BUT DEF EE051 I/O CTL NOT SET AFTER XFR JMP TRETN EXIT TEST SECTION. HED TST09 - TESTS 'CLF I/O' CTL FUNCTION & STF 6,7 * TST09 -- CHECKS THE DMA CLF CONTROL FUNCTION AND * STF 6 AND STF 7 ABILITY TO STOP TRANSFERS. * TST09 JSB STF SET I-O FLAG FF. JSB RDYD1 READY DMA1. LDA USRSC DON'T DO STC OR CLC OTA 6 STC 6,C TURN ON DMA1. JSB SFS DID DMA1 CLF CLEAR I-O FLAG? JMP E053+2 YES! DO NEXT TEST. E053 JSB ERMSG I/O FLAG NOT CLR AFTER DMA1 XFER DEF EE053 JSB STF SET I-O FLAG. JSB RDYD2 READY DMA2. LDA USRSC DON'T DO STC OR CLC OTA 7 STC 7,C TURN ON DMA2. JSB SFS DID DMA2 CLEAR I-O FLAG FF? JMP E054+2 YES! DO NEXT TEST. E054 JSB ERMSG I/O FLG NOT CLR AFTER DMA2 XFR DEF EE054 * * -- TESTS ABILITY TO TURN DMA OFF * BY SETTING THE DMA FLAGS * JSB CLCC TURN OFF INTERFACE JSB RDYD1 READY DMA1. STC 6,C START TRANSFER. STF 6 TURN OFF DMA1. JSB STF ATTEMPT TO COMPLETE TRANSFER. INB,SZB WAIT A COUPLE JMP *-1 OF CYCLES. LIA 2 INPUT WORD COUNT. SZA DID STF 6 STOP TRANSFER? JMP E055+2 YES! DO NEXT TEST. E055 JSB ERMSG STF 6 DID NOT TURN OFF DMA1 DEF EE055 JSB CLCC CLEAR I-O FLAG. JSB RDYD2 READY DMA2. STC 7,C START TRANSFER. STF 7 STOP TRANSFER. JSB STF TRY TO COMPLETE TRANSFER. INB,SZB WAIT A COUPLE JMP *-1 OF CYCLES. LIA 3 GET WCR2 CONTENTS. SZA DID STF 7 STOP DMA2 TRANSFER? JMP TRETN YES! EXIT TEST SECTION. E056 JSB ERMSG STF 7 DID NOT TURN OFF DMA2 DEF EE056 JMP TRETN EXIT TEST SECTION. HED TST10 ILLEGAL SELECT CODE TEST * TST10 -- CHECKS FOR AN ILLEGAL DMA DECODE OF * SELECT CODE 2,3,6 AND 7. * TST10 LDA THLTX PUT A STC 2 PATTERN STC 3 IN BOTH OTA 2 WORD LDA NB77 COUNT OTA 3 REGISTERS. CLB INITIALIZE TEST SC TO 0. SCLOP LDA LIAXX GET LIA INSTRUCTION. AND NB77 STRIP AWAY OLD SC. IOR B MERGE IN NEW SC. STA LIAXX PUT NEW LIA IN LINE. LIAXX LIA 0 EXECUTE ILLEGAL LIA XX. CPA THLTX DID LIA READ SC 2? RSS YES! REPORT ERROR. JMP E032+2 NO! DO NEXT SC. JSB FIXMS UPDATE ASC 1,32 ERROR DEF EE032+1 MESSAGE. LDA LIAXX GET ILLEGAL LIA. E032 JSB ERMSG ILLEGAL LIA 2 DEF EE032 * A=INSTRUCTION THAT ACTED LIKE A LIA 2. CPA NB77 DID ILLEGAL LIA 3 OCCUR? RSS YES! REPORT ERROR. JMP NXTSC NO! TEST NEXT SC. JSB FIXMS UPDATE ASC 1,67 ERROR DEF EE032+1 MESSAGE. LDA LIAXX GET ILLEGAL LIA. E067 JSB ERMSG ILLEGAL LIA 3 DEF EE032 * A=INSTRUCTION THAT ACTED LIKE A LIA 3 NXTSC INB UPDATE SC. CPB B2 IS THIS SC 2? ADB B2 YES! SKIP TO SC 4. CPB B100 LAST SC TESTED? RSS YES! DO NEXT TEST. JMP SCLOP NO! DO NEXT SC. SKP * ---- TEST SELECT CODE DECODE OF SELECT * CODES 6 AND 7. * CLB INITIALIZE SC TO 0. STF 6 SET THE FLAG FF ON STF 7 DMA1 AND DMA2. MALOP LDA CLFXX GET A CLF INSTRUCTION. AND NB77 STRIP AWAY OLD SC. IOR B MERGE IN NEW SC. STA CLFXX PUT ILLEGAL CLF IN LINE. CLFXX CLF 0 EXECUTE ILLEGAL CLF X. SFC 6 DID DMA1 FLAG GET CLEARED? JMP E057+2 NO! DO NEXT TEST. JSB FIXMS YES! UPDATE ASC 1,57 ERROR DEF EE032+1 MESSAGE. LDA CLFXX GET ILLEGAL CLF INST. E057 JSB ERMSG DMA1 FLAG CLEARED BY AN DEF EE032 ILLEGAL CLF XX. * A= INSTRUCTION THAT ACTED LIKE A CLF 6 SFC 7 DID DMA2 FLAG GET CLEARED? JMP E060+2 NO! DO NEXT SC. JSB FIXMS YES! UPDATE ASC 1,60 ERROR DEF EE032+1 MESSAGE. LDA CLFXX GET ILLEGAL CLF INST. E060 JSB ERMSG DMA2 FLAG CLEARED BY AN DEF EE032 ILLEGAL CLF XX. * A=INSTRUCTION THAT ACTED LIKE A CLF 7 INB UPDATE SC. CPB B6 IS THIS SC 6? ADB B2 YES! SKIP TO SC 10. CPB B100 LAST SC TESTED? JMP TRETN YES! EXIT TEST SECTION. JMP MALOP NO! GO DO NEXT SC. HED TST11 WCR COUNT UP TEST * TST11 -- CHECKS THE ABILITY OF THE WORD COUNT REGISTERS * TO INCREMENT FROM 0 TO 177777B. * TST11 CLB READY INITIAL WCR1 SETTING. LARL1 STB PADDR SAVE TEST DATA. LDA M2 SAVE -2 IN STA NULL THE COUNTER. DOLOP LDB PADDR GET WCR1 TEST VALUE. LDA ANULL GET DUMMY ADDRESS. JSB OUT1 INITIALIZE DMA1 OUTPUT XFER. LDA CNTLW CHANGE CONTROL XOR BIT15 TO IOR USRSC NO OTA 6 STC. JSB CLCC CLEAR I-O. JSB STF SET I-O FLAG FF. STC 6,C TURN ON DMA1. INB UPDATE TO 1 XFER+WCR1. STB DAOUT SAVE EXPECTED WCR1. STF 6 TURN OFF DMA1. LIB 2 GET ACTUAL WCR1. LDA DAOUT RESTORE EXPECTED WCR1. CPA B 2 XFERS OCCUR? JMP E061+2 YES! SKIP ERROR REPORT. DST SVRES NO! SAVE RESULTS. JSB PDATA SAVE ERROR DATA. JSB FIXMS UPDATE ASC 1,61 ERROR DEF EE033+1 MESSAGE. E061 JSB FIX33 E061 BAD WCR1 AFTER 2 XFERS. * A=EXPECTED WCR1 CONTENTS. * B=ACTUAL WCR1 CONTENTS. JMP NXWP1 CONTINUE TESTING. ISZ NULL 2 PASSES COMPLETED? JMP DOLOP NO! TRY PATTERN AGAIN. NXWP1 LDB DAOUT YES! UPDATE TO NEXT WCR1. CPB M1 LAST PATTERN CHECKED? RSS YES! DO DMA2 TEST. JMP LARL1 NO! DO NEXT PATTERN. SKP CLB READY INITIAL WCR2 SETTING. LARL2 STB PADDR SAVE WCR2 TEST PATTERN. LDA M2 SET COUNTER STA NULL TO -2. DOLP2 LDB PADDR GET WCR2 TEST ADDRESS. LDA ANULL GET DUMMY XFER ADDRESS. JSB OUT2 INITIALIZE DMA2 OUTPUT. LDA CNTLW CHANGE CONTROL XOR BIT15 TO IOR USRSC NO OTA 7 STC. JSB CLCC CLEAR I-O. JSB STF SET I-O FLAG FF. STC 7,C TURN ON DMA2. INB FORM AND SAVE STB DAOUT EXPECTED WCR2. STF 7 TURN OFF DMA2. LIB 3 GET ACTUAL WCR2. LDA DAOUT RESTORE EXPECTED WCR2. CPA B 2 XFERS OCCUR? JMP E062+2 YES! SKIP ERROR REPORT. DST SVRES NO! SAVE RESULTS. JSB PDATA READY ERROR DATA. JSB FIXMS UPDATE ASC 1,62 ERROR DEF EE033+1 MESSAGE. E062 JSB FIX34 E062 BAD WCR2 AFTER 2 XFERS. * A=EXPECTED WCR2 CONTENTS * B=ACTUAL WCR2 CONTENTS JMP NXWP2 CONTINUE TESTING. ISZ NULL 2 PASSES COMPLETED? JMP DOLP2 NO! EXECUTE ADDRESS AGAIN. NXWP2 LDB DAOUT YES! UPDATE TO NEXT WCR2. CPB M1 LAST PATTERN CHECKED? JMP TRETN YES! EXIT TEST SECTION. JMP LARL2 NO! DO NEXT PATTERN. HED TST12 MAR COUNT UP TEST * TST12 -- CHECKS THE ABILITY OF THE DMA MEMORY ADDRESS * REGISTERS TO INCREMENT FROM 2 TO 77777. * TST12 LDA B2 SET INITIAL MAR TEST VALUE. STA PADDR SAVE MAR TEST VALUE. JSB CLCC INSURE INTERFACE IS OFF. LDB CNT12 SET 32K-2 WORD TRANSFER. JSB OUT1 INITIALIZE DMA1 OUTPUT. LDA USRSC DON'T DO STC OR CLC AT END OF TRANSFER OTA 6 STC 6,C TURN ON DMA1. CLE SET FOR FIRST TRANSFER. LOPIM JSB STC TRANSFER ONE WORD. NOP LDB PADDR CHECK IF POINTER CPB CKPAD JMP GOOD1 SEZ,CME,RSS FIRST TRANSFER? JMP LOPIM YES SKIP CHECK LIAX1 LIA CH GET I-O INPUT BUFFER. LDB PADDR,I GET EXPECTED DATA. JSB FIXDT GO MASK DATA. CPA B XFER VALID DATA? JMP GOOD1 YES! DO NEXT TEST. STB EXPDA SAVE EXPECTED DATA. STA DAIN NO! SAVE ACTUAL DATA. JSB FIXMS UPDATE ASC 1,63 THE DEF EE063+1 ERROR JSB FIXMS MESSAGE ASC 1,A1 TO DEF EE063+4 DMA1 JSB SETOT OUTPUT. E063 JSB PXDAT E063 DMA1 OUTPUT XFER ERROR. * A=TRANSFER ADDRESS * B=ACTUAL DATA TRANSFERRED GOOD1 LDA PADDR GET TEST ADDRESS. ISZ PADDR MOVE TO NEXT ADDRESS. CCE SET FOR ONE WORD TRANSFER. CPA STDA LAST ADDRESS TESTED? JMP MART2 YES! CHECK DMA2 MAR. JMP LOPIM NO! DO ADDR AGAIN. SKP MART2 LDA B2 SET UP INITIAL MAR2 TEST VALUE. STA PADDR SAVE MAR2 TEST ADDR. JSB CLCC INSURE INTERFACE IS OFF. LDB CNT12 SET 2 WORD TRANSFER. JSB OUT2 INITIALIZE DMA2 OUTPUT. LDA USRSC DON'T DO STC OR CLC AT END OF TRANSFER OTA 7 STC 7,C TURN ON DMA2. CLE SET FOR FIRST TRANSFER. MARI2 JSB STC START TRANSFER. NOP LDB PADDR CHECK IF POINTER? CPB CKPAD JMP GOOD2 YES SKIP CHECK SEZ,CME,RSS FIRST TRANSFER? JMP MARI2 YES LIAX2 LIA CH GET TRANSFERRED DATA? LDB PADDR,I GET EXPECTED DATA? JSB FIXDT GO MASK DATA. CPA B XFER VALID. JMP GOOD2 YES! SKIP ERROR REPORT. STB EXPDA SAVE EXPECTED DATA STA DAIN NO! SAVE ACTUAL DATA. JSB FIXMS UPDATE ASC 1,64 THE DEF EE063+1 ERROR JSB FIXMS MESSAGE ASC 1,A2 TO DEF EE063+4 DMA2 JSB SETOT OUTPUT. E064 JSB PXDAT E064 DMA2 OUTPUT XFER ERROR. * A=TRANSFER ADDRESS * B=ACTUAL DATA TRANSFERRED GOOD2 LDA PADDR GET TEST ADDRESS. ISZ PADDR MOVE TO NEXT ADDRESS CCE SET FOR NEXT WORD CPA STDA LAST ADDRESS? JMP TRETN YES! EXIT TEST SECTION. JMP MARI2 TRY NEXT ADDRESS. HED TST13 DMA IN TEST * TST13 -- TESTS THE ABILITY OF DMA TO EXECUTE INPUT TRANSFERS. * TST13 JSB RDYXF READY TRANSFER. JSB OUT1 INITIALIZE DMA1 INPUT. JSB RDYIO READY I-O. STC 6,C TURN ON DMA1. LDA NULL GET FIRST XFER ADDR DATA. LDB PATT1 GET EXPECTED DATA. CHKPT JSB FIXDT GO MASK DATA. STB DAIN SAVE EXPECTED DATA CPA B TRANSFER VALID? JMP E065+1 YES! SKIP ERROR. JSB FIXMS NO! UPDATE ASC 1,65 THE DEF EE063+1 ERROR JSB FIXMS MESSAGE ASC 1,A1 TO DEF EE063+4 DMA1 JSB SETIN INPUT. E065 JSB PXDT2 REPORT BAD INPUT XFER. * A=TRANSFER ADDRESS * B=EXPECTED DATA ISZ CNTR SECOND WORD CHECKED YET? RSS NO! GO CHECK IT. JMP MARIN YES! GO CHECK DMA2. ISZ PADDR UPDATE TEST PATTERN PNTR. LDA NULL+1 GET SECOND XFER ADDR DATA. LDB PATT2 GET SECOND PATTERN. JMP CHKPT GO CHECK IT. SKP MARIN JSB RDYXF READY TRANSFER. JSB OUT2 INITIALIZE DMA2 INPUT. JSB RDYIO READY I-O. STC 7,C TURN ON DMA2. LDA NULL GET FIRST XFER ADDR DATA LDB PATT1 GET EXPECTED DATA. CHKPN JSB FIXDT GO MASK DATA. STB DAIN SAVE EXPECTED DATA CPA B TRANSFER VALID? JMP E066+1 YES! SKIP ERROR REPORT. JSB FIXMS NO! UPDATE ASC 1,66 THE DEF EE063+1 ERROR JSB FIXMS MESSAGE ASC 1,A2 TO DEF EE063+4 DMA2 JSB SETIN INPUT. E066 JSB PXDT2 REPORT BAD DMA2 IN XFER. * A=TRANSFER ADDRESS * B=EXPECTED DATA ISZ CNTR SECOND XFER CHECKED? RSS NO! GO CHECK IT. JMP TRETN YES! EXIT TEST SECTION. ISZ PADDR UPDATE TEST PATTERN POINTER. LDA NULL+1 GET EXPECTED PATTERN. LDB PATT2 GET SECOND TEST PATTERN. JMP CHKPN GO CHECK SECOND XFER. HED TST14 STC,CLF AND OVERRIDE TEST * TST14 TESTS NO STC OR CLF OCCURS ON THE LAST DMA INPUT XFER * AND DMA1 CYCLES OVERRIDE DMA2 CYCLES. * TST14 CLC 0,C CLEAR I-O. CCB WORD COUNT=-1. LDA ANULL XFER ADDR. IOR BIT15 INPUT XFER. JSB OUT1 READY DMA1 IN. JSB TSTC1 CHECK DMA1 STC. SFC 0 STC OCCUR? JMP E100+2 NO! SKIP ERROR. E100 JSB ERMSG E100 ILLEGAL STC ON DEF EE100 LAST DMA1 INPUT XFER. CLC 0,C CLEAR I-O. CCB WORD COUNT=-1. LDA ANULL XFER ADDR. IOR BIT15 INPUT XFER. JSB OUT2 READY DMA2 IN. JSB TSTC2 CHECK DMA2 STC. SFC 0 STC OCCUR? JMP E101+2 NO! SKIP ERROR. E101 JSB ERMSG E101 ILLEGAL STC ON LAST DEF EE101 DMA2 INPUT XFER. JSB STF SET I-O FLAG FF. CLF 0 TURN OFF INT SYSTEM. CCB WORD COUNT=-1. LDA ANULL XFER ADDR. IOR BIT15 FORM INPUT ADDR. JSB OUT1 READY DMA1 IN. STC 6,C TURN ON DMA1. JSB SFS DMA1 CLF OCCUR? RSS YES! REPORT ERROR. JMP E102+2 NO! SKIP ERROR. E102 JSB ERMSG E102 ILLEGAL CLF ON LAST DEF EE102 DMA1 INPUT XFER. JSB STF SET I-O FLAG FF. CCB WORD COUNT=-1. LDA ANULL XFER ADDR. IOR BIT15 FORM INPUT ADDR. JSB OUT2 READY DMA2. STC 7,C TURN ON DMA2. JSB SFS DMA2 CLF OCCUR? RSS YES! REPORT ERROR. JMP IOX1 NO! SKIP ERROR. E103 JSB ERMSG E103 ILLEGAL CLF ON LAST DEF EE103 DMA2 INPUT XFER. SKP IOX1 CLF CH CLEAR I-O FLAG FF. LDB M2 WORD COUNT=-2. LDA ANULL XFER ADDR. JSB OUT1 READY DMA1 OUT. LDA NULL SAVE EXPECTED STA SVRES TRANSFER ADDRESS CONTENTS. LDA ANULL XFER ADDR. IOR BIT15 FORM INPUT ADDR. JSB OUT2 READY DMA2 IN. STC 6,C TURN ON DMA1 OUT. STC 7,C TURN ON DMA2 IN. JSB STF SET I-O FLAG FF. STF 6 TURN OFF DMA1. STF 7 TURN OFF DMA2. LDA NULL GET XFER ADDR CONTENTS. CPA SVRES WAS INPUT XFER ALLOWED? JMP TRETN NO! EXIT TEST SECTION. E104 JSB ERMSG E104 DMA1 DID NOT OVERRIDE DEF EE104 DMA2 CYCLE. JMP TRETN EXIT TEST SECTION. HED DUAL CH DMA BLOCK TRANSFER TEST * TEST 15 IS AN APPENDIX ADDED TO THE DMA TEST. TEST 15 IS NOT * PART OF THE STANDARD TEST RUN. THIS TEST REQUIRES TWO UI CARDS * WITH A SPECIAL TEST CONNECTOR AS DESCRIBED IN THE MOD. * SEE FIGURE A-1 AND A-2.. * * * TO RUN SET: * * P-REG TO 100B. * S-REG WITH SELECT CODES: * SC1 IN BITS 5-0 * SC2 IN BITS 9-6 * PRESS PRESET RUN * WAIT FOR HALT 74B * S-REG WITH PROGRAM OPTIONS * PRESS RUN * HALT 77B FOR COMPLETION * * * 12930 PROGRAMMABLE SWITCHES * * 85S1-2 97S1-2 106S1-1 * S2-5 S2-5 S2-5 * S3-10(0) S3-10(0) S3-9 * * 87S1-1 102S1-2 * S2-4 S2-7 * S3-8 S3-10(0) * * NOTE: THE PROGRAMMABLE SWITCHES ARE SET USING A SCREWDRIVER * TO POSITION THE CONTACT MECHANISM. SEE FIGURE A-3 * IN MOD FOR SWITCH LOCATION AND SWITCH POSITIONS. * * THE SWITCH SETTING SHOWN ABOVE ARE FOR TEST 15 USING * TWO UI CARDS WITH SPECIAL TEST CONNECTOR DESCRIBED IN * THE MOD.. SKP TST15 NOP CLC 0,C CLEAR I-O CLC 6 CLEAR CLC 7 DMA 1 & 2 LDA ASC6 SET UP MESSAGE JSB SMSG FOR DMA-6 LDA FWAM FIRST WORD OF AVBL. MEMORY LDB LWAM LAST WORD OF AVBL. MEMORY CMA,INA MAKE 2'S COMP ADA B SUBTRUCT FWAM FROM LWAM ARS DIVIDE BUF AREA IN HALF NOP DEBUG STA BUF SAVE BUF SIZE ISZ BUF ADD 1 TO BUF ADDR CMA,INA 2'S COMP INA SUBTRACT 1 STA WCNT WORD COUNT FOR DMA TRANSFER LDA BUF GET ADDRESS ADA FWAM FOR BUF2 STA BUF AND STORE LDA M2 -2 STA CNTX SET COUNTER NOP DEBUG L1 LDA WCNT NUMBER OF WORDS STA CNT TO BE TRANSFERED JSB PATX GENERATE PATTERN IN BUFFER CH2 CLC CHA,C CLEAR CONTROL AND CH3 CLC CHB,C FLAG ON I-O JSB DMAO INITIALIZE DMA FOR OUT JSB DMAI INITIALIZE DMA FOR INPUT STC 6,C START DMA CH1 STC 7,C START DMA CH2 NOP DEBUG CLA CLEAR FOR CPU CYCLE COUNT CH1 STC CHB,C START I-O CH L8 NOP FOUR INSTR SFC 6 LOOP FOR JMP L6 21MX-E INA,SZA CPU JMP L8 CYCLE COUNT LIB 2 DMA DID'NT COMPLETE JSB ERR2 REPORT ERR JMP L4 SKIP DMA FLAG 6 TEST L6 STA TST14 STORE CPU CYCLES NOP DEBUG LIB 2 READ DMA WC REG SZB IS DMA WC COMPLETE ? JSB ERR1 REPORT ERR NOP DEBUG LDB 115B CHECK IF SSB,RSS 21MX-E JMP *+3 NO - NOT MX SERIES BLF,SLB IS IT "E" ? JMP L10 YES "E" NOP DEBUG LDB WCNT ALLOW CMB ONLY ADA B ONE CPU CYCLE JMP L9 FOR 2100-21MX-M L10 NOP DEBUG ALS,ALS MULTIPLY CPU COUNTS BY FOUR L9 ADA WCNT ADD NEGATIVE WC VALUE SSA ERR IS COUNT = POSTIVE VALUE JMP L4 OK JSB ERMSG REPORT ERR DEF EE117 L4 NOP DEBUG LDA ASC7 SET UP MESSAGE JSB SMSG FOR DMA-7 SFS 7 IS FLAG SET ? JMP *+2 NO, CHECK WCR JMP L7 YES LIB 3 READ WCR JSB ERR2 REPORT ERR JMP L5 L7 LIB 3 READ WCR SZB IS WCR = TO ZERO JSB ERR1 NO, REPORT ERR L5 NOP DEBUG LDB BUFZ ADDR OF BUFFER-Z LDB B,I ACT DATA LDA PATT1 EXP DATA CPA B COMPARE DATA JMP *+3 OK JSB ERMSG REPORT ERROR DEF EE115 NOP DEBUG LDB BUFZ ADDR OF BUFFER-Z INB NEXT ADDR IN BUFF-Z LDB B,I ACT DATA LDA PATT2 EXP DATA CPA B COMPARE DATA JMP *+3 OK JSB ERMSG REPORT ERROR DEF EE116 NOP DEBUG LDA BUF GET ADDRESS FOR BUF2 STA BUF2 TABLE POINTER LDA WCNT NUMBER OF INA SKIP FIRST WORD IN BUF STA CNT WORDS IN TABLE LDA BUF1 GET ADDRESS FOR BUF1 INA SKIP FIRST WORD IN BUF STA BUFX TABLE POINTER NOP DEBUG L2 LDA BUF2,I GET EXPECTED DATA LDB BUFX,I GET ACTUAL DATA NOP DEBUG CPA B COMPARE DATA RSS OK JSB ERR REPORT ERROR ISZ BUF2 INCR BUF2 TABLE POINTER ISZ BUFX INCR BUF1 TABLE POINTER ISZ CNT LAST WORD ? JMP L2 NO, LOOP JSB REV REVERSE I-O CH NOP DEBUG ISZ CNTX HAS SECOND PASS BEEN RUN ? JMP L1 NO, LOOP AGAIN NOP DEBUG JMP TRETN RETURN * HED MESSAGES INTRO OCT 6412 ASC 10,DMA-DCPC DIAGNOSTIC OCT 6412 ASC 01,// EE000 ASC 07,E000 CLF-SFS6/ EE001 ASC 07,E001 CLF-SFC6/ EE002 ASC 07,E002 STF-SFC6/ EE003 ASC 07,E003 STF-SFS6/ EE004 ASC 07,E004 CLF-SFS7/ EE005 ASC 07,E005 CLF-SFC7/ EE006 ASC 07,E006 STF-SFC7/ EE007 ASC 07,E007 STF-SFS7/ EE010 ASC 11,E010 ILLEGAL DMA1 INT/ EE011 ASC 11,E011 ILLEGAL DMA2 INT/ EE012 ASC 09,E012 NO DMA1 INT/ EE015 ASC 09,E015 NO DMA2 INT/ EE020 ASC 07,E020 DMA1 CRS/ EE021 ASC 07,E021 DMA2 CRS/ EE022 ASC 05,E022 CLC6/ EE023 ASC 05,E023 CLC7/ EE024 ASC 09,E024 DMA1 PRESET/ EE025 ASC 09,E025 DMA2 PRESET/ EE026 ASC 07,E026 PRIORITY/ EE032 ASC 08,E032 SC DECODE/ EE033 ASC 05,E033 WCR1 OCT 6412 M33A ASC 07, EXP = XXXXXX OCT 6412 M33B ASC 07, ACT = XXXXXX/ EE041 ASC 05,E041 WCR1/ EE042 ASC 05,E042 WCR2/ EE043 ASC 09,E043 DMA1 STC FF/ EE045 ASC 09,E045 DMA2 STC FF/ EE047 ASC 09,E047 DMA1 CLC FF/ EE051 ASC 09,E051 DMA2 CLC FF/ EE053 ASC 07,E053 DMA1 CLF/ EE054 ASC 07,E054 DMA2 CLF/ EE055 ASC 06,E055 STF 6/ EE056 ASC 06,E056 STF 7/ EE063 ASC 07,E063 DMA1 OUT OCT 6412 M63A ASC 11,TRANSFER ADDR =XXXXXX OCT 6412 M63B ASC 11,EXPECTED DATA =XXXXXX OCT 6412 M63C ASC 11,ACTUAL DATA =XXXXXX/ EE100 ASC 13,E100 DMA1 STC GENERATION/ EE101 ASC 13,E101 DMA2 STC GENERATION/ EE102 ASC 7,E102 DMA1 CLF/ EE103 ASC 7,E103 DMA2 CLF/ EE104 ASC 10,E104 DMA1 OVERRIDE/ EE105 ASC 05,E105 WCR2/ EE106 ASC 05,E106 WCR1/ EE107 ASC 19,E107 DUAL CH DMA BLOCK TRANSFER FAILED OCT 6412 M107A ASC 13,EXP =YYYYYY ADDR =XXXXXX OCT 6412 M107B ASC 14,ACT =ZZZZZZ ADDR =XXXXXX/ EE110 ASC 18,E110 DMA FLAG 6 SET BUT WCR=ORIGINAL ASC 05,WC VALUE/ EE111 ASC 19,E111 DMA FLAG 6 SET BUT WCR NOT ZERO/ EE112 ASC 20,E112 DMA FLAG 6 NOT SET & WCR= ORIGINAL ASC 05,WC VALUE/ EE113 ASC 19,E113 DMA FLAG 6 NOT SET BUT WCR=ZERO/ EE114 ASC 19,E114 DMA FLAG 6 NOT SET & WCR=XXXXXX/ EE115 ASC 15,E115 DMA WROTE 1 WORD PASS WC/ EE116 ASC 20,E116 DMA WROTE 2 OR MORE WORDS PAST WC/ EE117 ASC 17,E117 EXECESSIVE CPU CYCLE COUNTS/ PRSET ASC 13,H324 PRESS PRESET AND RUN/ FWAA EQU * FIRST WORD AVAILABLE MEMORY END