SEZ SOC HLT ERH E NOT SET / O SET CLE CPA B1 SZB HLT ERH ADA/ADB CCA CLB ADB B1 SOS SEZ HLT ERH E / O SET ADA B1 SEZ SOC HLT ERH E NOT SET / O SET CLE CPB B1 SZA HLT ERH ADA/ADB CLA CCB ADA M1 SOS SEZ HLT ERH E / O SET ADB M1 SEZ SOC HLT ERH E NOT SET / O SET CLE CPA M1 RSS HLT ERH ADA CPB M2 RSS HLT ERH ADB CCA CLB ADB M1 SOS SEZ HLT ERH E / O SET ADA M1 SEZ SOC HLT ERH E NOT SET / O SET CLE CPA M2 RSS HLT ERH ADA CPB M1 RSS HLT ERH ADB LDA ALT0 LDB ALT1 ADB ALT1 SOC SEZ HLT ERH E SET / O NOT SET CLO ADA ALT1A SEZ SOC HLT ERH E NOT SET / O SET CLE CPB ALT0 SZA HLT ERH ADA/ADB LDA ALT1 LDB ALT0 ADA ALT0 SOS SEZ HLT ERH E / O SET ADB ALT1A SEZ SOC HLT ERH E NOT SET / O SET CLE CPA M1 SZB HLT ERH ADA/ADB SKP * PRE-TEST PART A (BP) * * * CALCULATE MEMORY SIZE & RUN MEMORY ADDRESS AND PATTERN ON * MEMORY ABOVE 4K-IF MEMORY>4K. * LDB B10K START WITH 8K ADB B3 MOVE TO ADDRESS 3 L02 CLA CLEAR WRAPAROUND STA 3B LDA ALT0 TRY TO STA B,I WRITE PATTERN THERE CPA 3B DID IT WRAPAROUND JMP NXT02 YES - NO MEMORY CPA B,I DID THE PATTERN STORE? JMP *+5 YES.MEMORY IS THERE CLA NO.SHOULD CPA B,I BE ALL JMP NXT02 0'S HLT ERH NOT 0.SOMETHING'S WRONG ADB B10K MOVE UP 4K SSB,RSS DONE 32K? JMP L02 NO NXT02 LDA B CHANGE HANDS ADA M10K BACK UP ONE STEP CLE CLO CPA B3 ONLY 4K? JMP NXT05 YES - SKIP MEMORY TESTS AND B70K ELIMINATE LOWER 2 BITS ADA B7700 POINT TO BINARY LOADER ADA M1 OTA SWREG DISPLAY MEMORY SIZE SEZ SOC HLT ERH E NOT SET / O SET CLE STA LADD LWAM LDA B7700 SET FWAM STA FADD SKP * * QUICK MEMORY ADDRESS TEST * LDA FADD L03 STA A,I STORE IN EACH CPA LADD LOCATION OF AVAILABLE JMP *+3 MEMORY THE ADDRESS INA OF THAT LOCATION JMP L03 LDA FADD L04 CPA A,I VERIFY MEMORY RSS CONTENTS HLT ERH MEMORY ADDRESS FAILURE CPA LADD JMP *+3 GO ON TO MEMORY PATTERN TEST INA JMP L04 * * * QUICK MEMORY PATTERN TEST * CCA START WITH 177777 L05 LDB FADD L06 STA B,I WRITE PATTERN INB IN A REG IN CPB LADD AVAILABLE MEMROY RSS JMP L06 LDB FADD L07 CPA B,I COMPARE PATTERN READ RSS TO PATTERN WRITTEN HLT ERH MEMORY PATTERN FAILED INB CPB LADD RSS JMP L07 CPA ALT1 DONE 125252 YET? JMP NXT03 YES CPA ALT0 LDA ALT1 SZA,RSS LDA ALT0 CPA M1 CLA JMP L05 NXT03 EQU * SKP * PRE-TEST PART A (BP) * * WORST CASE PATTERN TEST * LDA FADD LDB FADD L08 STA TMPA AND B140 WRITE CPA B140 WORST CLA CASE SZA PATTERN CCA STA B,I IN MEMORY CPB LADD JMP NXT04 INB LDA TMPA INA JMP L08 NXT04 LDA FADD LDB FADD L09 STA TMPA AND B140 NOW CPA B140 COMPARE CLA PATTERN SZA CCA CPA B,I RSS HLT ERH MEMORY PATTERN FAILED CPB LADD JMP NXT05 CONTINUE LDA MHLT FILL UNUSED MEMORY STA B,I WITH HALTS INB LDA TMPA INA JMP L09 SKP * PRE-TEST PART A (BP) * * PROGRAM COMES HERE FROM CURRENT PAGE * * BPJP0 JMP *+2,I HLT ERH JMP (BP),I (TO BP) DEF *+3 HLT ERH JMP (BP),I (TO BP) HLT ERH " " JMP *+2,I HLT ERH JMP (BP),I (TO CP) DEF CPJP0 HLT ERH JMP (BP),I (TO CP) HLT ERH " " BPJP1 JMP *+2,I HLT ERH JMP (BP),I (TO CP) DEF CPJP1 HLT ERH JMP (BP),I (TO CP) HLT ERH " " * BPJB0 NOP LDA *-1 CPA DJBR2 RSS HLT ERH JSB (BP) FROM CP RETURN ADDRESS LDA HLT0 JSB *+2,I JBR5 HLT ERH JSB (BP),I TO CP DEF CPJB0 HLT ERH JSB (BP),I TO CP HLT ERH JSB (BP),I TO CP * * END OF PRE-TEST PART A (BP) SKP * * STORAGE AND CONSTANTS * B0 OCT 0 B1 OCT 1 B2 OCT 2 B3 OCT 3 B4 OCT 4 B5 OCT 5 B6 OCT 6 B7 OCT 7 B10 OCT 10 B17 OCT 17 B37 OCT 37 B40 OCT 40 B54 OCT 54 B60 OCT 60 B70 OCT 70 B77 OCT 77 B140 OCT 140 B170 OCT 170 B177 OCT 177 B777 OCT 777 B7700 OCT 7700 B6.5K OCT 6500 B10K OCT 10000 B70K OCT 70000 B100K OCT 100000 M1 OCT -1 M2 OCT -2 M10K OCT -10000 M17 OCT 177760 M77 OCT 177700 M70K OCT 107777 D8K3 OCT 10003 D32K3 OCT 70003 TMPA OCT -1 TMPB OCT 0 SVA NOP SVB NOP FADD NOP LADD NOP DISN NOP DIBP NOP SWRX NOP BIOSC NOP SCX NOP IBUFP NOP APTRN OCT 172525 ALT0 OCT 125252 ALT0A OCT 125253 ALT1 OCT 052525 ALT1A OCT 052526 SKP CFIG DEF CFRG CHSC DEF CKSC ISCR DEF ISC MDVR DEF MVDVR CFM DEF CFMEM MSG DEF MSGR IBUFD DEF IBUF CNST DEF CNTS CNSC DEF CVSC DTMPA DEF TMPA DTMPB DEF TMPB GMTSA DEF GMTS GMTEA DEF GMTE DJBR0 DEF JBR0 DJBR1 DEF JBR1 DJBR2 DEF JBR2 DTMC DEF TMC DTMI DEF TMI DLDVR DEF LDVR DCO DEF CNSLO LPDV DEF LNPTR MHLT OCT 106075 * * CFMPJ JSB *+1 NOP CLF INTP CLC 5B,C TURN OFF MEMORY PROTECT CLB JMP *-4,I RETURN * DEFT DEF *+1,I OCT 101,102,103,104,106,107 OCT 121,122,123,124,125,127 DEF DTMC DEF LDMXA DEF FMTBF DEF M1 * DMABT OCT 160000 SKP CPTOT DEF CPTT * CPTT DEC -252 OCT 0 DEC -309 OCT 10000 16A DEC -309 OCT 20010 16B DEC -309 OCT 30010 16C DEC -246 OCT 40000 15A DEC -246 OCT 50010 14A DEC -246 OCT 60210 14B DEC -252 OCT 70033 2100 DEC -203 OCT 100133 21MX XETC DEC -1573 OCT 110133 21XE DEC -252 OCT 0 DEC -252 OCT 0 DEC -252 OCT 0 DEC -252 OCT 0 DEC -252 OCT 0 DEC -252 OCT 0 SKP SKP CFCTP DEF *-3,I ASC 4,2116,_ ASC 4,2116,_ ASC 4,2116,_ ASC 4,2115,_ ASC 4,2114,_ ASC 4,2114,_ ASC 4,2100,_ ASC 4,21MX M,_ ASC 4,21MX E,_ * CFDNA DEF *+1 ASC 05, NO DMA, _ CFDIV DEF *+1 ASC 04, DMA, _ CFMNA DEF *+1 ASC 05,NO MPRT, _ CFMIV DEF *+1 ASC 04,MPRT, _ * CFMTB DEF *+1 DEF CFMS0 DEF CFMS1 DEF CFMS2 DEF CFMS3 DEF CFMS4 DEF CFMS5 DEF CFMS6 DEF CFMS7 * CFMS0 ASC 2,4K _ CFMS1 ASC 2,8K _ CFMS2 ASC 3,12K _ CFMS3 ASC 3,16K _ CFMS4 ASC 3,20K _ CFMS5 ASC 3,24K _ CFMS6 ASC 3,28K _ CFMS7 ASC 3,32K _ CFMS DEF *+1 ASC 04,MEMORY/ SKP SKP CCSDY NOP HLT 71B NO DEVICE CLA STA CODSC STA CIDSC JMP CCSDY,I * CSLDY DEF *+1 * OCSDY NOP PSEUDO CONSOLE DRIVER CLA CLB ABS JMP+CSLO+100000B * CNSLD DEF *+1 CD531 DEF O531 DEF *-* CD587 DEF O587 DEF *-* CD966 DEF O966 DEF C966 DEF OCSDY DEF CCSDY DEF OCSDY DEF CCSDY DEF OCSDY DEF CCSDY DEF OCSDY DEF CCSDY DEF CNSLO MAINTAIN CURRENT DRIVER FOR LINK DEF *-* * * ICSDY NOP PSEUDO CONSOLE INPUT DRIVER CLA (MUST BE 21 WORDS AFTER OCSDY) CLB OCT 106071 ABS JMP+CSLI+100000B SKP LPDF DEF *+1 DEF OLP67 DEF OLPXX LPDYD REP 5 DEF OLPDY DEF LNPTR * * OLPDY NOP ABS STA+BFR SAVE A ABS LDA+LPTR GET RETURN ADDRESS ABS STA+CSLO PUT IT IN CONSOLE ABS LDA+BFR RESTORE A ABS JMP+CSLO+1 * * DINDD DEF DINDT * LDDY DEF LDDY0 * LDDY0 NOP PSEUDO LOADER DRIVER OCT 106072 CCA SET EOT IF RUN IS PRESSED ABS JMP+LD+100000B * REP 6 OCT 106075 MEMORY HALT SKP * START OF PRE-TEST PART B (CP) * NXT05 CLA OTA SWREG CLEAR S-REG. SOS SEZ HLT ERH E / O SET LDA HLT0 HALT IF CURRENT PAGE/ LDB HLT0 BASE PAGE DOESN'T WORK JMP *+1 LDB .ALT1 LDA ALT0 RSS OCT 1 USED IN CPU TYPE CALCULATION STA .TMPA STB TMPB CPA .ALT0 RSS HLT ERH LDA (BP) / CPA (CP) CPB ALT1 RSS HLT ERH LDB (CP) / CPB (BP) LDB .TMPA LDA TMPB CPA .ALT1 RSS HLT ERH STB (BP) CPA (CP) CPB ALT0 RSS HLT ERH STA (CP) / CPB (BP) SKP * PRE-TEST PART B (CP) JMP *+2 HLT ERH JMP (CP) JMP *+4 HLT ERH JMP (CP) JMP *+4 HLT ERH JMP (CP) JMP *-2 HLT ERH JMP (CP) * JMP BPJP0 HLT ERH JMP (CP) TO (BP) CPJP0 JMP *+2,I HLT ERH JMP (CP),I (TO BP) DEF BPJP1 HLT ERH JMP (CP),I (TO BP) HLT ERH " " " CPJP1 JMP *+2,I HLT ERH JMP (CP),I (TO CP) DEF *+3 HLT ERH JMP (CP),I (TO CP) HLT ERH " " * CLA STA .JB0 STA .JB1 STA BPJB0 STA CPJB0 LDA HLT0 LDB HLT0 JSB *+2 JBR3 HLT ERH JSB (CP) .JB0 NOP LDA *-1 CPA DJBR3 RSS HLT ERH JSB (CP) RETURN ADRESS LDA HLT0 JSB *+2,I JBR4 HLT ERH JSB (CP),I DEF *+3 HLT ERH JSB (CP),I HLT ERH JSB (CP),I .JB1 NOP LDA *-1 CPA DJBR4 RSS HLT ERH JSB (CP),I RETURN ADDRESS LDA HLT0 JSB BPJB0 JBR2 HLT ERH JSB (BP) CPJB0 NOP LDA *-1 CPA DJBR5 RSS HLT ERH JSB (BP),I TO CP RETURN ADDRESS SKP * PRE-TEST PART B (CP) * LDA SRGP1 1000100100100111 LDB SRGP2 1001100000100000 ALS 1001001001001110